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Picardy 2020

A reinterpretation of the Picardy 2m SSB transceiver by F6FEO combined with the Anglian 3L transverter. Additional inspirations: uBitx, the KN-Q7, LimeRFE and EI9GQ's "Building a Transceiver" book. Many thanks to all the designers behind these projects.

The hardware design is licenced under the "CERN Open Hardware Licence Version 2 - Permissive", see cern_ohl_p_v2.txt. The firmware is MIT-licenced.

  • Designed in KiCad
  • Meant to be used with a microwave transverter and stand-alone 144MHz
  • For transverter usage, no PA reduces current consumption.
  • For stand-alone, see MMRF1021 amplifier below.
  • Using a STM32F103C8T6 controller
  • Programmed in Rust
  • Si5351 clock source (generates HF clocks)
  • An LCD display
  • Discarded ideas
  • Include a Lars Widenius GPSDO originally published on eevblog
  • Offer a 10MHz output refclk for a transverter
  • Instead, have a 25MHz ref input, and use an external reference
  • Use the Si5351 to generate the VHF LO at 116 MHz
    • It wasn't clean enough, so a separate XTAL LO board was designed
    • With a 114.286 MHz crystal, we get a first IF of 29714 kHz

First QSO done with this transceiver and MMRF1021 amplifier on 2020-12-07

On RX, an LNA4ALL LNA was used. On TX, 2x SPF5189Z, a bandpass filter to remove the LO, and the MMRF1021 amplifier were used, giving about 200mW output power on the very first trial.

Later, the external bandpass and 2x SPF5189Z were replaced by an internal bandpass with less insertion loss and a single SPF5189Z.

First 3cm QSO done with Picardy 2020 as IF transceiver on 2020-02-21

Using a Downeast Microwave 10368CK transverter.

TODO

  • Where does the 1.6kHz offset come from?

Open questions

  • CW
  • Does the trick with the DC bias to leak the LO work ?
    • Not tested, but plan B done (J306)
    • Use an additional PWM output for plan B?
  • Put sidetone volume setting before RV303?
    • Hook up to LM386 BYPASS?

Issues

  • Coupling between VHF filter coils was way too large
  • Fixed, replacement of coupling caps.
  • SEQ0 is used in inverted-logic in baseband, and noninverted for power relay
  • Due to inconsistent naming
  • Ugly fix on K603 side, use SEQ0n, SEQ1, SEQ2
  • G6K-2F-RF all have the Y footprint, not the equidistant one.
  • And they have additional GND flaps too, which are not in the Kicad footprint library
  • Can be kludged-in
  • 5V jumper is less useful as hoped
  • Intention: disable VHF stuff
  • Unintended effect: removes LCD backlight
  • C319 and C326 are redundant
  • BC856W wrong footprint
  • R327 upsets DC offset of audio amp, added 2.2uF capacitive decoupling in series with 1k
  • PTT makes loud click, assemble with 100nF only, still loud
  • Connected LM386 back to 8V, through 0 Ohm instead of 10 Ohm (was on 12V through 10 Ohm because DCDC noise). Still loud.
  • Investigate other muting schemes.
    • Connecting BYPASS to GND generates click
    • 2N3819 based muting according to G3YCC works better.
  • Assemble 1k + 100nF for coupling, revert to 12k for R329, use 20k for R326 to slow down the transition a bit
  • 2m LPF from LimeRFE use values I don't stash
  • 20pF done with 2x 10pF
  • SW: ADC input for buttons looks messed up...
  • Four buttons instead of 7 are enough anyway
  • Connect 3V3 LDO to 12V directly
  • Also, replace DCDC by L7808 to improve spectral purity
  • Actually there would be more to be gained with a DCDC on 5V or 3V3!
  • Added a LM360T LDO for the MMRF1021 so that it can be powered from 3S LiPo (11.1V) and Pb (13.8V) batteries
  • Add 2.2uF caps near consumers
  • Replace C535, C536
  • Replace C343, C315
  • Next to R508
  • Next to R305
  • Parallel to C331
  • Parallel to C607
  • Next to R306
  • Next to R504
  • Next to R328
  • Next to R515
  • Reduce RF coupling
  • Added 100pF caps on microphone connector and CW input
  • Added 22pF on DC jack, DIN

PCB Assembly Plan

  1. DCDC converter for 8V and LDOs
  2. Check output voltages
  3. Check drop under load

  4. STM32F103C8T6

  5. Programming
  6. Sidetone low-pass
  7. Probably need to do a UI proto already

  8. Si5153

  9. Check I2C works

  10. 8V and 5V relay

  11. Check switching with microcontroller and validate resistors

  12. Baseband

  13. Crystal filter shape
  14. RX and TX filter shape
  15. Receive path: IF mixer, crystal filter relay, IF AGC, BFO mixer, AGC measure, AF amp, SPKR
    • Verify LO levels into SA602A: at least 200mVpp
  16. Transmit path: Mic amp

  17. Anglian

  18. LO filter shape
  19. LO amp. Mixer needs +7dBm
  20. All passives
    • Verify correct voltages for amplifiers
    • Verify PIN currents (Between 20mA and 60mA, below 0.8V)
    • Verify filter shapes
  21. IF amplifiers, both RX and TX
  22. VHF amplifiers
  23. VHF bandpass filter
  24. Mixer

  25. External switching relay

Tuning

IF gain (R307)

Define if we need C361, C360

Ensure LO1 and BFO voltage level at TP301 TP302

Additional remarks

Very good explanations about DDS vs DPLL from Hans Summers

Si5153 test before PCB fab:

  • It seems the desired frequency plan can be achieved:
  • clk0: LO1 = 28 - 4.9152 + VFO, i.e. from 23 to 25
  • clk1: VHF-LO = 144 + 28 and 144 - 28, i.e. 116 MHz
  • clk2: BFO = 4.91521
  • See freqplan.py
  • This ended up being too noisy and was replaced by an external VHF LO, with LO1 and BFO generated with Si5153
  • No 116MHz crystals on mouser, but 114.285MHz are available, HF bandpass filters recalculated.